The present invention relates to planarization of semiconductor wafers using a chemical mechanical planarization technique. More particularly, the present invention relates to an improved system and method for planarizing semiconductor wafers consistently and efficiently over a single integrated processing path.
Semiconductor wafers are typically fabricated with multiple copies of a desired integrated circuit design that will later be separated and made into individual chips. A common technique for forming the circuitry on a semiconductor wafer is photolithography. Part of the photolithography process requires that a special camera focus on the wafer to project an image of the circuit on the wafer. The ability of the camera to focus on the surface of the wafer is often adversely affected by inconsistencies or unevenness in the wafer surface. This sensitivity is accentuated with the current drive towards smaller, more highly integrated circuit designs. Wafers are also commonly constructed in layers, where a portion of a circuit is created on a first level and conductive vias are made to connect up to the next level of the circuit. After each layer of the circuit is etched on the wafer, an oxide layer is put down allowing the vias to pass through but covering the rest of the previous circuit level. Each layer of the circuit can create or add unevenness to the wafer that must be smoothed out before generating the next circuit layer. Wafer fabrication is a delicate process that is sensitive to stray particulates and so is typically conducted in the highly controlled environment of a xe2x80x9cclean room.xe2x80x9d
Chemical mechanical planarization (CMP) techniques are used to planarize the raw wafer and each layer of material added thereafter. Available CMP systems, commonly called wafer polishers, often use a rotating wafer holder that brings the wafer into contact with a polishing pad rotating in the plane of the wafer surface to be planarized. A polishing fluid, such as a chemical polishing agent or slurry containing microabrasives is applied to the polishing pad to polish the wafer. The wafer holder then presses the wafer against the rotating polishing pad and is rotated to polish and planarize the wafer.
While this primary wafer polishing process is important for wafer fabrication, the primary wafer polishing alone is only part of the CMP process that must be completed before the wafer can be returned to a clean room. CMP process steps that must be completed before the wafer can be returned to the clean room will include cleaning and rinsing the polishing fluid from the wafer followed by drying. Other steps before the final washing, rinsing and drying may include an additional polish utilizing different and non-compatible chemicals and slurries from the initial polishing process as well as an additional polish process to remove fine scratches left by the previous polishing steps. Intermediate rinsing between these steps may be required as well. Existing devices for planarizing wafers are often discrete machines that take up large amounts of space and require manual or semi-automated transport of the wafers from one machine to the next. Any delay in transferring wafers from one machine to another may allow the chemical slurry to begin drying thus creating great difficulties in polishing or scrubbing the wafers. Delays in wafer transfer between processes or machines can also let the chemical action of the chemical slurry last too long and adversely affect the polishing process.
Existing polishers and scrubbers have different wafer processing times. The polishing process usually takes a greater amount of time than the buffing or scrubbing process. To optimize wafer process time and maximize equipment utilization, some CMP processing schemes will utilize multiple wafer polishers that each only complete a single planarization step. The wafers from these separate polishers are then each processed on the same buffer or scrubber. A problem with this technique is that the batches of wafers are processed on separate polish stations and inconsistencies in polish between the wafers are more likely. In order to minimize these inconsistencies, existing CMP systems must have extremely high tolerances for the equipment and must exactly reproduce the processing conditions at each polisher. The different wafer holders must be able to hold the wafers at the same angle and put the same amount of pressure on the wafer when holding the wafer against the polisher. The polishers must rotate at the same speed and provide the same consistency and amount of polishing agent. Without careful tolerances, inconsistent CMP processing can occur with potentially harmful effects on the yield or performance of the semiconductor circuits created from the wafer.
Accordingly, there is a need for a system and method of performing CMP on a plurality of semiconductor wafers in an efficient and consistent manner.
According to a first aspect of the present invention, a method for uniformly planarizing and cleaning the surface of at least one semiconductor wafer over a single process path is disclosed. The method includes the steps of providing a semiconductor wafer and a semiconductor wafer polishing system, mounting the semiconductor wafer in the semiconductor wafer polishing system, and transporting the semiconductor wafer to a wafer loading station. The wafer is transported from the wafer loading station to a first primary polishing station and a first polishing procedure to partially planarize the semiconductor wafer is performed. The wafer is transported to a second polishing station and a second polishing procedure completes planarization of the semiconductor wafer. These steps are repeated for all wafers processed. In one alternative embodiment, each polishing station may utilize a different chemical polishing agent and process.
According to another aspect of the present invention, an apparatus for performing chemical mechanical planarization of a plurality of semiconductor wafers implementing a single process path for each of the plurality of semiconductor wafers includes a first wafer transport mechanism for moving a semiconductor wafer from a load station to a transfer station. A second wafer transport mechanism is positioned adjacent the transfer station and is designed to move the semiconductor wafer from the transfer station to a semiconductor wafer loading device. The wafer loading device loads individual wafers onto a wafer conveyor. The wafer conveyor has a number of wafer receiving areas and is rotatably movable to receive a semiconductor wafer in each of the plurality of wafer receiving areas. The wafer conveyor is arranged in a manner to allow continuous closed loop motion of the wafers along a predetermined process path and is optimized to avoid any need to backtrack along the process path. A first primary polishing station positioned along the process path planarizes a semiconductor wafer over a predetermined time to produce a partly planarized semiconductor wafer. A second primary polishing station positioned along the process path completes the planarization of the partly planarized semiconductor. A touch-up polisher buffs the planarized wafer to remove any trace scratches left by the first and second primary polishing stations. Preferably, the wafers are also rinsed in a wafer conveyor loader and scrubbed and dried in a wafer scrubbing device to completely remove slurry and particulates. Each of the semiconductor wafers travels the single process path.
In a preferred embodiment, a semiconductor wafer transfer mechanism for transporting a semiconductor wafer between a wafer conveyor and a wafer processing point is disclosed. The transfer mechanism includes a rotatable, axially movable spindle. A lever arm is attached to the spindle having one end connected to a movable frame and a second end connected to a fine adjustment spindle driver attached to the movable frame. A coarse adjustment spindle driver is attached to a fixed frame and connected to the movable frame so that the coarse adjustment spindle driver can move the movable frame relative to the fixed frame in an axial direction of the spindle. The semiconductor wafer transfer mechanism preferably cooperates with detachable wafer carrying heads and a rotatable wafer conveyor to move wafers between the wafer conveyor and a polishing station or wafer conveyor loader. The coarse and fine adjustment spindle drivers provide an added degree of control over the pressure on a wafer held against a polishing pad at a polishing station.